iPOINT Publications |
Abstract Field Programmable Gate Arrays (FPGAs) are being used to provide fast Internet Protocol (IP) packet routing and advanced queuing in a highly scalable network switch. A new module, called the Field-programmable Port Extender (FPX), is being built to augment the Washington University Gigabit Switch (WUGS) with reprogrammable logic. FPX modules reside at the edge of the WUGS switching fabric. Physically, the module is inserted between an optical line card and the WUGS gigabit switch backplane. The hardware used for this project allows ports of the switch populated with an FPX to operate at rates up to 2.4 Gigabits/second. The aggregate throughput of the system scales with the number of switch ports. Logic on the FPX module is implemented with two FPGA devices. The first device is used to interface between the switch and the line card, while the second is used to prototype new networking functions and protocols. The logic on the second FPGA can be reprogrammed dynamically via control cells sent over the network.
Abstract: This paper presents the design and prototype of an intelligent, 3-Dimensional Queue (3DQ) system for high-performance, scalable, input buffered ATM switches. The 3DQ uses pointers and linked lists to organize ATM cells into multiple virtual queues according to priority, destination, and virtual connections, then selects proper cells for switching based on Quality-of-Service (QoS) parameters and run-time traffic conditions. Using Field-Programmable-Gate-Array (FPGA) devices, our prototype hardware can process ATM cells at 622 Mb/s (OC-12). Using more aggressive technology (Multi-Chip-Module (MCM) and fast GaAs logic), the same 3DQ design can process cells at 2.5 Gb/s (OC-48). Combined with the Matrix-Unit-Cell-Scheduler (MUCS) module, a high-performance input-buffered ATM switch system has been designed, which avoids Head-Of-Line (HOL) blocking and achieves near-100\% link bandwidth utilization.
This paper gives a very brief (4 page) overview of broadband networks, explains how input queueing and multicasting are supported by the iPOINT testbed, and mentions the development of the iPOINT Video-on-Demand server
Abstract: Our prototype of a fully-functional Asynchronous Transfer Mode (ATM) switch validates the design of a 128 Gb/s optoelectronic ATM switch. Optoelectronics, rather than all optical componets, are used to simutaneously address all of the specific requirements mandated by the ATM protocol. In this paper, we present the Illinois Pulsar-based Optical Interconnect (iPOINT) testbed, and present our results obtained for the prototype switch in a working environment consisting of an optical network of Sun SPARCStations and other local and wide-area ATM switches.
Abstract: Input queuing has advantages for building ultra-broadband ATM switches with the throughput beyond 100 Gbps because it imposes minimal memory bandwidth requirements. Using a novel Multi-Tag-Queue (MTQ) input module and a novel Matrix-Unit-Cell-Scheduling (MUCS) module, our input queue-based ATM switch avoids head-of-line blocking and provides almost 100% utilization. In a 32-port configuration, the switch can deliver an aggregate throughput of 128 Gbps.
Abstract: This thesis presents the design and implementation of the multicast, input-buffered Asynchronous Transfer Mode (ATM) switch for use with the iPOINT testbed. The input-buffered architecture of this switch is optimal in terms of the memory bandwidth required for the implementation of an ATM queue module. The contention resolution algorithm used by the iPOINT switch supports atomic multicast, enabling the simultaneous delivery of ATM cells to multiple output ports without the need for recirculation buffers, duplication of cells in memory, or multiple clock cycles to transfer a cell from an input queue module.
The implementation of the prototype switch is unique in that it was entirely constructed using Field Programmable Gate Array (FPGA) technology. A fully functional, five-port, 800 Mbps ATM switch has been developed and currently serves as the high-speed, optically interconnected, local area network for a cluster of Sun SPARCstations and the gateway to the wide-area Blanca/XUNET gigabit testbed. Through the use of FPGA technology, new hardware-based switching algorithms and functionality can be implemented without the need to modify hard-wired logic. Further, through the use of the remote switch manager, switch controller, and FPGA controller, the management, operation, and even logic functionality of the iPOINT testbed can be dynamically altered, all without the need for physical access to the iPOINT hardware.
Based on the existing prototype switch, the design of the FPGA-based, gigabit-per-second ``Any-Queue'' module is presented. For this design in its maximum configuration, up to 256 queue modules can be supported, providing an aggregate throughput of 180 Gbps. Further, the design of a 16-port, 11.2 Gbps aggregate throughput, switch fabric is documented that can be entirely implemented using only eight FPGA devices.
In addition to the design of the switch module, this thesis describes the supporting components of the iPOINT testbed, including the network control and application software, the hardware specifications of the switch interface, and the device requirements of the optoelectronic components used in the testbed. VHDL and schematics of the switch hardware and C/C++ source code for the supporting systems are included.
Abstract: FPGA technology has been used for the development and implementation of a prototype input queuing module of the Illinois Pulsar-based Optical INTconnect (iPOINT) Asynchronous Transfer Mode (ATM) testbed. Pipeline techniques were extensively used to solve timing problems and increase throughput. This prototype queuing module has been fully tested for bandwidth of 100 Mbps.
Abstract: Multimedia services such as video-on-demand (VOD) will require certain level of quality of service (QoS). Yet, the VPD service will be required to run on general purpose machines such as PCs or workstations and shared networks such as Ethernet and LAN ATM because of cost requirements for home networking. In this environment, one of the problems will become the application QoS specification such as video display frame rate before any negotiation for QoS guarantee starts. This paper presents as on-line probe-based algorithm to specify initial QoS for continuous media and determine critical degradation point when performance degradation occurs and adaptive mechanisms should be applied. This probe-based algorithm should be a part of a negotiation phase to identify the actual application QoS and its degradation point.
Abstract: This paper presents a fuzzy logic based ATM cell scheduling technique for input buffered non-blocking (ATM) switches. Simulation results indicate that such scheduling significantly reduces the average wait time for high priority cells when compared with single and multiple priority FIFO buffers. Simulations were run on an actual trace of ATM video cells generated by an ATM camera. These ATM video cells were multiplexed with other ATM cells from different sources. The reduction in wait time for high priority traffic is expected to improve the quality-of-service requirements at the communicating ends.
Abstract: Optical devices and fiber-optic communications links are the enabling technology for multigigabit networking. These devices can be employed in computer networks to provide high-bandwidth networking resources for desktop workstations. Because of the burstiness of computer traffic, packet switching, rather than simple circuit switching, is better suited for data networking.
Abstract: This document outlines the plans to support IP-based multicast applications on Xunet. This extension allow multicast--based multimedia programs, including nevot (network voice terminal), vat (visual audio tool), nv (network video), and wb (whiteboard), to run unmodified over Xunet. This document also provides C library examples of IP multicast code.
Abstract : Multicast is the generalized model of network communications. While a limited multicast service can built upon the existing unicast Asynchronous Transfer Mode (ATM) service, a native ATM multicast service is required for scalability and efficient utilization of network resources. This paper describes a framework for multicast service on the Xunet gigabit testbed called SMAX (Simple Multicast ATM for Xunet). This model, however, is general and can be used for any ATM network.