Introduction to ATM|Introduction to ABR|The Virtual Output Queue|Simulation Results|ABR Publications|ABR Links|Back to iPOINT

ABR Publications of the iPOINT group

• Matthias Bossardt, Available Bit Rate Architecture and Simulation for an Input-Buffered and Per-VC Queued ATM Switch, Diploma Thesis at the University of Illinois at Urbana-Champaign, Submitted to the Swiss Federal Institute of Technology, Lausanne, February 1998

• Matthias Bossardt, John W. Lockwood, Sueng-Yong Park, and Sung-Mo Kang, Available Bit Rate Architecture and Simulation for an Input-Buffered and Per-VC Queued ATM Switch, Submitted to appear in IEEE Globecom 1998

More iPOINT publications

Introduction to ATM|Introduction to ABR|The Virtual Output Queue|Simulation Results|ABR Publications|ABR Links|Back to iPOINT

Last updated 03/12/98 by  Matthias Bossardt